ESM-100: Symmetric/Asymmetric Security Protocol Accelerator

SASPA is the Symmetric and Asymmetric Security Performance Accelerator and it is designed to collect a number of security cores such as ciphers, hashes, public key accelerators and true random number generators under a common look-aside slave bus interfaces (AMBA AXI, AHB).

Any combination of cipher and hash cores be configured behind the AMBA interface. In many cases there are also performance options for cores which improve the bit/cycle capacity of the engine. Designers can also request the inclusion of the CLP-300: Public Key Accelerator or the CLP-27: True Random Number Generator should these functions be required for the target application.

As the SASPA is targeted at medium performance, and cost constrained applications, the core is designed to use a single memory block which will store messages and contexts. SASPA class engines are used for applications such as content protection, IPsec, SSL and wireless designs.

Features

Highly configurable embedded security module
Core acts as a processor peripheral
Support for all ciphers, hashes and MAC algorithms used in major protocols such as IPsec, WiMAX, Wi-Fi, 3GPP LTE/LTE-A, SRTP, SSL/TLS/DTLS, MACsec
Cipher algorithms: AES, DES/3DES, ARC4 [RC4], MULTI2, KASUMI, SNOW 3G, ZUC
Cipher modes: ECB, CBC, CTR, OFB, CFB, f8, XTS, UEA1, UEA2, 128-EEA1, 128-EEA2, 128-EEA3
Authenticated Encryption with Associated Data (AEAD) modes: CCM, GCM
Hash/MAC algorithms: MD5, SHA-1, SHA-224, SHA-256, SHA-384, SHA-512, SHA-512/224, SHA-512/256, AES-XCBC-MAC, AES-CMAC, KASUMI-f9, KASUMI-UIA1, SNOW-3G-UIA2, SNOW-3G-128-EIA1, AES-128-EIA2, ZUC-128-EIA3, CRC-32-IEEE802.3
Hash modes: raw hash, SSLMAC, HMAC
Other modes: GSM A5/3, ECSD A5/3 and GEA3 keystream generation
Offloads the computationally intensive parts of public key cryptography
Integer operations (512, 768, 1024, 1536, 2048, 3072, and 4096-bit)
- Modular exponentiation, division, multiplication, inversion, addition, and subtraction.
ECC-GF(p) operations ( 160, 192, 224, 256, 384, 512 and 521-bit)
- Point multiplication, addition, doubling, and verification
Configurable firmware memory type
RAM only
ROM only
RAM/ROM mix
Support for AMBA/AHB, AMBA/AXI and synchronous RAM slave interfaces
Ellipsys middleware for RSA, Diffe-Hellman, DSA
Ellipsys middleware for prime field ECC operations such as ECDSA and ECDH

Benefits

Silicon proven
Highly integrated
SoC/ASIC developers and embedded system OEMs benefit from
- Reduced time to market
- Reduced risk
- Highly tuned solutions for performance, power and size
IP developed by industry experts through a structured and rigorous development and verification program

Applications

Networking/VPN
- MACsec(802.1 AE)
- IPsec
- VoIP/SIP gateways
- SSL/TLS/DTLS
- SRTP
Wireless
- Wi-Fi(802.11)
- WiMAX(802.16)
- 3GPP, LTE, LTE-A
- Femtocells
- Base stations
- Handsets
DRM & Content protection
- DTCP
- DRM
- WMDRM
- OMA
Storage
Printers
Others
- Contact Elliptic for more information
NSA Suite B
E-commerce acceleration
Military communications systems
Payment Card Industry
Secure Manufacturing
Protection of IP and high valued content

Downloads

Product Brief: Contact Elliptic

주요 제품

ETS-020: tVault HDCP 2.2
A proven HDCP-based content protection solution that provides robust security inside Trusted Execution Environments (TEEs) and enforces the protection of sensitive information to ensure that it is stored, processed and accessed only by authorized applications.The solution integrates seamlessly within frameworks such as ARM TrustZone™, where the critical security components are embedded in a trusted and secure OS environment. The non-critical components are executed by the rich OS, such as Android.

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